/*
 * ddr.h
 *
 *
 *  Created on: 26-05-2017
 *      Author: KJ
 */

#ifndef DDR_H_
#define DDR_H_

#include "tdefs.h"

#define MAX_SAMPLE_SIZE		512


#define DDR_REG_BANK_SIZE 		0x100000

// bank states
#define BANK_EMPTY				0x00
#define BANK_BUFFERING			0x01
#define BANK_TRIGGERED			0x02
#define BANK_FILLED				0x03

#define DDR_MAX_REG_BANKS		4

struct ddr_reg_data
{
	u8 *data;
	u8 state;
	u32 addr_offset;
	u32 pre_trigger_cnt;
	u32 post_trigger_cnt;
	u32 total_cnt;
	u32 trigger_offset;
	u32 tr_time;
	u32 tr_time_ms;
	u16 sample_size;
	u8 an_count;
	u16 bin_count;
	u16 decimation;
}__attribute__((__packed__));

struct ddr_reg_inf
{
	u8 cur_reg_bank;
	struct ddr_reg_data bank[DDR_MAX_REG_BANKS];
}__attribute__((__packed__));

enum ddr_fs
{
	Fs_100Hz,
	Fs_50Hz,
	Fs_10Hz,
	Fs_5Hz,
	Fs_1Hz,
	Fs_0_5Hz,
	Fs_0_1Hz
};

extern volatile u8 ddr_bank0[DDR_REG_BANK_SIZE];
extern volatile u8 ddr_bank1[DDR_REG_BANK_SIZE];
extern volatile u8 ddr_bank2[DDR_REG_BANK_SIZE];
extern volatile u8 ddr_bank3[DDR_REG_BANK_SIZE];

extern volatile struct ddr_reg_inf ddr_regs;

struct ddr_logic
{
	u8 *trigger_ptr;
	u8 trigger_bit_no;
	u32 decimation;
	u32 decimation_cnt;
	u32 pre_trigger_samples;
	u32 post_trigger_samples;
	u32 max_reg_samples;
};

struct ddr_io
{
	u32 trigger_in;
}__attribute__((__packed__));

struct ddr_params
{
	u32 pre_trigger_time;
	u32 post_trigger_time;
	u32 max_reg_time;
	u32 f_sampling;
}__attribute__((__packed__));

struct ddr_args
{
	struct ddr_io io;
	struct ddr_params params;
//	u16 crc;
}__attribute__((__packed__));

extern int ddr_initlog(void *args, void *logic);
extern void ddr(void *args, void *logic);

#endif /* DDR_H_ */
