/*
 * dev_ctrl.h
 *
 *  Created on: 07-02-2017
 *      Author: Krzysztof Jakubczyk
 */

#ifndef DEV_CTRL_H_
#define DEV_CTRL_H_

#include "tdefs.h"
#include "helper.h"

struct dev_ctrl_logic
{
	u8 *pwr1_ok;
	u8 pwr1_ok_bit_mask;
	u8 *pwr2_ok;
	u8 pwr2_ok_bit_mask;
	u8 *nowe_nast;
	u8 nowe_nast_bit_mask;
	u8 *blad_konf;
	u8 blad_konf_bit_mask;
	u8 *blad_sd;
	u8 blad_sd_bit_mask;

	u8 *test_we;
	u8 test_we_bit_mask;
	u8 *test_wy;
	u8 test_wy_bit_mask;
	u8 *test_log;
	u8 test_log_bit_mask;
	u8 *blok_wy;
	u8 blok_wy_bit_mask;
	u8 *test_an;
	u8 test_an_bit_mask;
	struct binary_io pps2;
	float *sat_cnt;

	struct binary_io mgb_ch[8];
	struct binary_io mki_zp6;
	struct binary_io mki_iec[4];
	struct binary_io pps_ok;
	struct binary_io ptp_ok;
	struct binary_io ntp_ok;
	struct binary_io irigb_fix_ok;
	struct binary_io iec_err;
	struct binary_io pps_sw;
	struct binary_io service;
	u16 pps_timeout_cnt;
	u16 pps_timeout_cnt2;
	u16 fix_timeout_cnt;
	u16 fix_timeout_cnt2;
};

struct dev_ctrl_io
{
	u32 test_we_in;
	u32 test_wy_in;
	u32 test_log_in;
	u32 blok_wy_in;
	u32 test_an_in;
	u32 pps2_in;
	u32 service_mode_in;
	u32 pwr1_ok_out;
	u32 pwr2_ok_out;
	u32 nowe_nast_out;
	u32 blad_konf_out;
	u32 blad_sd_out;
	u32 mgb_ch1_act_out;
	u32 mgb_ch2_act_out;
	u32 mgb_ch3_act_out;
	u32 mgb_ch4_act_out;
	u32 mgb_ch5_act_out;
	u32 mgb_ch6_act_out;
	u32 mgb_ch7_act_out;
	u32 mgb_ch8_act_out;
	u32 mki_zp6_act_out;
	u32 mki_iec1_act_out;
	u32 mki_iec2_act_out;
	u32 mki_iec3_act_out;
	u32 mki_iec4_act_out;
	u32 pps_ok_out;
	u32 ptp_ok_out;
	u32 irigb_fix_ok_out;
	u32 iec_err_out;
	u32 sat_cnt_float_out;
	u32 ntp_ok_out;
	u32 pps_sw_out;
}__attribute__((__packed__));

struct dev_ctrl_params
{
}__attribute__((__packed__));

struct dev_ctrl_args
{
	struct dev_ctrl_io io;
	struct dev_ctrl_params params;
//	u16 crc;
}__attribute__((__packed__));

extern u32 dev_ctrl_state;
extern u32 service_mode;

#define DEV_CTRL_STATE_TEST_IN		0x01
#define DEV_CTRL_STATE_TEST_OUT		0x02
#define DEV_CTRL_STATE_TEST_LOG		0x04
#define DEV_CTRL_STATE_BLOCK_OUT	0x08
#define DEV_CTRL_STATE_TEST_AN		0x10
#define DEV_CTRL_STATE_CFG_CHANGE	0x0100
#define DEV_CTRL_STATE_CFG_ERR		0x0200
#define DEV_CTRL_STATE_SD_ERR		0x0400
#define DEV_CTRL_STATE_PPS_OK		0x0800
#define DEV_CTRL_STATE_PTP_OK		0x1000
#define DEV_CTRL_STATE_IRIGB_FIX_OK	0x2000
#define DEV_CTRL_STATE_NTP_OK		0x4000
#define DEV_CTRL_STATE_NTP_HISZP_OK	0x8000
#define DEV_CTRL_STATE_MGB_CHAN1	0x010000UL
#define DEV_CTRL_STATE_MGB_CHAN2	0x020000
#define DEV_CTRL_STATE_MGB_CHAN3	0x040000
#define DEV_CTRL_STATE_MGB_CHAN4	0x080000
#define DEV_CTRL_STATE_MGB_CHAN5	0x100000
#define DEV_CTRL_STATE_MGB_CHAN6	0x200000
#define DEV_CTRL_STATE_MGB_CHAN7	0x400000
#define DEV_CTRL_STATE_MGB_CHAN8	0x800000
#define DEV_CTRL_STATE_MKI_CHAN_ZP		0x1000000
#define DEV_CTRL_STATE_MKI_IEC_ERR		0x2000000
#define DEV_CTRL_STATE_MKI_UNUSED1		0x4000000
#define DEV_CTRL_STATE_MKI_UNUSED2		0x8000000
//
//
#define DEV_CTRL_STATE_MKI_IEC_CHAN1	0x10000000
#define DEV_CTRL_STATE_MKI_IEC_CHAN2	0x20000000
#define DEV_CTRL_STATE_MKI_IEC_CHAN3	0x40000000
#define DEV_CTRL_STATE_MKI_IEC_CHAN4	0x80000000

extern int dev_ctrl_initlog(void *arguments, void *logic);
extern void dev_ctrl(void *arguments, void *logic);
extern void dev_ctrl_20hz(void *arguments, void *logic);

#endif /* DEV_CTRL_H_ */
